import freechips.rocketchip.tilelink._
import freechips.rocketchip.util._
import sifive.blocks.devices.pinctrl.{EnhancedPin}
-import sifive.blocks.util.{DeglitchShiftRegister, ResetCatchAndSync}
+import sifive.blocks.util.{DeglitchShiftRegister}
/* The wrapper handles the Clock and Reset Generation for The AON block itself,
and instantiates real pad controls (aka pull-ups)*/
}
class MockAONWrapperBundle extends Bundle {
- val pads = new MockAONWrapperPins()
+ val pins = new MockAONWrapperPins()
val rsts = new MockAONMOffRstIO()
}
class MockAONWrapper(w: Int, c: MockAONParams)(implicit p: Parameters) extends LazyModule {
- val node = TLAsyncInputNode()
- val intnode = IntOutputNode()
val aon = LazyModule(new TLMockAON(w, c))
// We only need to isolate the signals
val isolation = LazyModule(new TLIsolation(fOut = isoOut, fIn = isoIn))
val crossing = LazyModule(new TLAsyncCrossingSink(depth = 1))
- isolation.node := node
+ val node: TLAsyncInwardNode = isolation.node
crossing.node := isolation.node
- val crossing_monitor = (aon.node := crossing.node)
+ aon.node := crossing.node
// crossing lives outside in Periphery
- intnode := aon.intnode
+ val intnode: IntOutwardNode = aon.intnode
lazy val module = new LazyModuleImp(this) {
- val io = new MockAONWrapperBundle {
- val in = node.bundleIn
- val ip = intnode.bundleOut
+ val io = IO(new MockAONWrapperBundle {
val rtc = Clock(OUTPUT)
val ndreset = Bool(INPUT)
- }
+ })
val aon_io = aon.module.io
- val pads = io.pads
+ val pins = io.pins
// -----------------------------------------------
// Generation of aonrst
// -----------------------------------------------
// ERST
- val erst = ~pads.erst_n.inputPin(pue = Bool(true))
+ val erst = ~pins.erst_n.inputPin(pue = Bool(true))
aon_io.resetCauses.erst := erst
aon_io.resetCauses.wdogrst := aon_io.wdog_rst
// Note that the actual mux lives inside AON itself.
// Therefore, the lfclk which comes out of AON is the
// true clock that AON and AONWrapper are running off of.
- val lfextclk = pads.lfextclk.inputPin(pue=Bool(true))
+ val lfextclk = pins.lfextclk.inputPin(pue=Bool(true))
aon_io.lfextclk := lfextclk.asClock
// Drive AON's clock and Reset
crossing.module.clock := lfclk
crossing.module.reset := crossing_slave_reset
- crossing_monitor.foreach { lm =>
- lm.module.clock := lfclk
- lm.module.reset := crossing_slave_reset
- }
-
// Note that aon.moff.corerst is synchronous
// to aon.module.clock, so this is safe.
isolation.module.io.iso_out := aon.module.io.moff.corerst
isolation.module.io.iso_in := Bool(true)
//--------------------------------------------------
- // PMU <--> pads Interface
+ // PMU <--> pins Interface
//--------------------------------------------------
- val dwakeup_n_async = pads.pmu.dwakeup_n.inputPin(pue=Bool(true))
+ val dwakeup_n_async = pins.pmu.dwakeup_n.inputPin(pue=Bool(true))
val dwakeup_deglitch = Module (new DeglitchShiftRegister(3))
dwakeup_deglitch.clock := lfclk
dwakeup_deglitch.io.d := ~dwakeup_n_async
aon.module.io.pmu.dwakeup := dwakeup_deglitch.io.q
- pads.pmu.vddpaden.outputPin(aon.module.io.pmu.vddpaden)
+ pins.pmu.vddpaden.outputPin(aon.module.io.pmu.vddpaden)
//--------------------------------------------------
// Connect signals to MOFF