spi: SPIParamsBase param needs to be public

[sifive-blocks.git] / src / main / scala / devices / spi / SPIFlash.scala

diff --git a/src/main/scala/devices/spi/SPIFlash.scala b/src/main/scala/devices/spi/SPIFlash.scala
index 1ad55ca4b3f81f73f99910176fbb096433d9b026..17144b86eb0d8425453d94698879505261818502 100644 (file)
--- a/src/main/scala/devices/spi/SPIFlash.scala
+++ b/src/main/scala/devices/spi/SPIFlash.scala
@@ -3,7 +3,7 @@ package sifive.blocks.devices.spi
 
 import Chisel._
 
-class SPIFlashInsn(c: SPIFlashConfigBase) extends SPIBundle(c) {
+class SPIFlashInsn(c: SPIFlashParamsBase) extends SPIBundle(c) {
   val cmd = new Bundle with HasSPIProtocol {
     val code = Bits(width = c.insnCmdBits)
     val en = Bool()
@@ -18,13 +18,13 @@ class SPIFlashInsn(c: SPIFlashConfigBase) extends SPIBundle(c) {
   val data = new Bundle with HasSPIProtocol
 }
 
-class SPIFlashControl(c: SPIFlashConfigBase) extends SPIBundle(c) {
+class SPIFlashControl(c: SPIFlashParamsBase) extends SPIBundle(c) {
   val insn = new SPIFlashInsn(c)
   val fmt = new Bundle with HasSPIEndian
 }
 
 object SPIFlashInsn {
-  def init(c: SPIFlashConfigBase): SPIFlashInsn = {
+  def init(c: SPIFlashParamsBase): SPIFlashInsn = {
     val insn = Wire(new SPIFlashInsn(c))
     insn.cmd.en := Bool(true)
     insn.cmd.code := Bits(0x03)
@@ -38,12 +38,12 @@ object SPIFlashInsn {
   }
 }
 
-class SPIFlashAddr(c: SPIFlashConfigBase) extends SPIBundle(c) {
+class SPIFlashAddr(c: SPIFlashParamsBase) extends SPIBundle(c) {
   val next = UInt(width = c.insnAddrBits)
   val hold = UInt(width = c.insnAddrBits)
 }
 
-class SPIFlashMap(c: SPIFlashConfigBase) extends Module {
+class SPIFlashMap(c: SPIFlashParamsBase) extends Module {
   val io = new Bundle {
     val en = Bool(INPUT)
     val ctrl = new SPIFlashControl(c).asInput
@@ -86,7 +86,7 @@ class SPIFlashMap(c: SPIFlashConfigBase) extends Module {
     }
   }
 
-  val (s_idle :: s_cmd :: s_addr :: s_pad :: s_data_pre :: s_data_post :: Nil) = Enum(UInt(), 6)
+  val (s_idle :: s_cmd :: s_addr :: s_pad :: s_data_pre :: s_data_post :: s_off :: Nil) = Enum(UInt(), 7)
   val state = Reg(init = s_idle)
 
   switch (state) {
@@ -105,10 +105,11 @@ class SPIFlashMap(c: SPIFlashConfigBase) extends Module {
           io.link.lock := Bool(false)
         }
       } .otherwise {
-        io.data.valid := io.addr.valid
-        io.addr.ready := io.data.ready
-        io.data.bits := UInt(0)
+        io.addr.ready := Bool(true)
         io.link.lock := Bool(false)
+        when (io.addr.valid) {
+          state := s_off
+        }
       }
     }
 
@@ -158,5 +159,13 @@ class SPIFlashMap(c: SPIFlashConfigBase) extends Module {
         state := s_idle
       }
     }
+
+    is (s_off) {
+      io.data.valid := Bool(true)
+      io.data.bits := UInt(0)
+      when (io.data.ready) {
+        state := s_idle
+      }
+    }
   }
 }