i965: Add support for Broadwell's new register types.

[mesa.git] / src / mesa / drivers / dri / i965 / gen6_clip_state.c

diff --git a/src/mesa/drivers/dri/i965/gen6_clip_state.c b/src/mesa/drivers/dri/i965/gen6_clip_state.c
index d6c1f1c893d1b54a7b058b0a45a7cecc4025bcf3..37a39b83fb7aee6b96e303dba1668e5f8dd78e55 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen6_clip_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_clip_state.c
@@ -30,54 +30,119 @@
 #include "brw_defines.h"
 #include "brw_util.h"
 #include "intel_batchbuffer.h"
+#include "main/fbobject.h"
 
 static void
 upload_clip_state(struct brw_context *brw)
 {
-   struct intel_context *intel = &brw->intel;
-   struct gl_context *ctx = &intel->ctx;
-   uint32_t depth_clamp = 0;
-   uint32_t provoking, userclip;
+   struct gl_context *ctx = &brw->ctx;
+   /* BRW_NEW_META_IN_PROGRESS */
+   uint32_t dw1 = brw->meta_in_progress ? 0 : GEN6_CLIP_STATISTICS_ENABLE;
+   uint32_t dw2 = 0;
+
+   /* _NEW_BUFFERS */
+   struct gl_framebuffer *fb = ctx->DrawBuffer;
+
+   /* CACHE_NEW_WM_PROG */
+   if (brw->wm.prog_data->barycentric_interp_modes &
+       BRW_WM_NONPERSPECTIVE_BARYCENTRIC_BITS) {
+      dw2 |= GEN6_CLIP_NON_PERSPECTIVE_BARYCENTRIC_ENABLE;
+   }
+
+   if (brw->gen >= 7) {
+      dw1 |= GEN7_CLIP_EARLY_CULL;
+
+      /* _NEW_POLYGON */
+      if ((ctx->Polygon.FrontFace == GL_CCW) ^ _mesa_is_user_fbo(fb))
+         dw1 |= GEN7_CLIP_WINDING_CCW;
+
+      if (ctx->Polygon.CullFlag) {
+         switch (ctx->Polygon.CullFaceMode) {
+         case GL_FRONT:
+            dw1 |= GEN7_CLIP_CULLMODE_FRONT;
+            break;
+         case GL_BACK:
+            dw1 |= GEN7_CLIP_CULLMODE_BACK;
+            break;
+         case GL_FRONT_AND_BACK:
+            dw1 |= GEN7_CLIP_CULLMODE_BOTH;
+            break;
+         default:
+            assert(!"Should not get here: invalid CullFlag");
+            break;
+         }
+      } else {
+         dw1 |= GEN7_CLIP_CULLMODE_NONE;
+      }
+   }
 
    if (!ctx->Transform.DepthClamp)
-      depth_clamp = GEN6_CLIP_Z_TEST;
+      dw2 |= GEN6_CLIP_Z_TEST;
 
+   /* _NEW_LIGHT */
    if (ctx->Light.ProvokingVertex == GL_FIRST_VERTEX_CONVENTION) {
-      provoking =
+      dw2 |=
         (0 << GEN6_CLIP_TRI_PROVOKE_SHIFT) |
         (1 << GEN6_CLIP_TRIFAN_PROVOKE_SHIFT) |
         (0 << GEN6_CLIP_LINE_PROVOKE_SHIFT);
    } else {
-      provoking =
+      dw2 |=
         (2 << GEN6_CLIP_TRI_PROVOKE_SHIFT) |
         (2 << GEN6_CLIP_TRIFAN_PROVOKE_SHIFT) |
         (1 << GEN6_CLIP_LINE_PROVOKE_SHIFT);
    }
 
    /* _NEW_TRANSFORM */
-   userclip = (1 << brw_count_bits(ctx->Transform.ClipPlanesEnabled)) - 1;
+   dw2 |= (ctx->Transform.ClipPlanesEnabled <<
+           GEN6_USER_CLIP_CLIP_DISTANCES_SHIFT);
+
+   if (ctx->Viewport.X == 0 &&
+       ctx->Viewport.Y == 0 &&
+       ctx->Viewport.Width == fb->Width &&
+       ctx->Viewport.Height == fb->Height) {
+      dw2 |= GEN6_CLIP_GB_TEST;
+   }
+
+   /* BRW_NEW_RASTERIZER_DISCARD */
+   if (ctx->RasterDiscard) {
+      dw2 |= GEN6_CLIP_MODE_REJECT_ALL;
+      perf_debug("Rasterizer discard is currently implemented via the clipper; "
+                 "%s be faster.", brw->gen >= 7 ? "using the SOL unit may" :
+                 "having the GS not write primitives would likely");
+   }
 
    BEGIN_BATCH(4);
    OUT_BATCH(_3DSTATE_CLIP << 16 | (4 - 2));
-   OUT_BATCH(GEN6_CLIP_STATISTICS_ENABLE);
+   OUT_BATCH(dw1);
    OUT_BATCH(GEN6_CLIP_ENABLE |
             GEN6_CLIP_API_OGL |
             GEN6_CLIP_MODE_NORMAL |
             GEN6_CLIP_XY_TEST |
-            userclip << GEN6_USER_CLIP_CLIP_DISTANCES_SHIFT |
-            depth_clamp |
-            provoking);
+            dw2);
    OUT_BATCH(U_FIXED(0.125, 3) << GEN6_CLIP_MIN_POINT_WIDTH_SHIFT |
              U_FIXED(255.875, 3) << GEN6_CLIP_MAX_POINT_WIDTH_SHIFT |
-             GEN6_CLIP_FORCE_ZERO_RTAINDEX);
+             (fb->NumLayers > 0 ? 0 : GEN6_CLIP_FORCE_ZERO_RTAINDEX));
    ADVANCE_BATCH();
 }
 
 const struct brw_tracked_state gen6_clip_state = {
    .dirty = {
-      .mesa  = _NEW_TRANSFORM,
-      .brw   = BRW_NEW_CONTEXT,
-      .cache = 0
+      .mesa  = _NEW_TRANSFORM | _NEW_LIGHT | _NEW_BUFFERS,
+      .brw   = BRW_NEW_CONTEXT |
+               BRW_NEW_META_IN_PROGRESS |
+               BRW_NEW_RASTERIZER_DISCARD,
+      .cache = CACHE_NEW_WM_PROG
+   },
+   .emit = upload_clip_state,
+};
+
+const struct brw_tracked_state gen7_clip_state = {
+   .dirty = {
+      .mesa  = _NEW_BUFFERS | _NEW_LIGHT | _NEW_POLYGON | _NEW_TRANSFORM,
+      .brw   = BRW_NEW_CONTEXT |
+               BRW_NEW_META_IN_PROGRESS |
+               BRW_NEW_RASTERIZER_DISCARD,
+      .cache = CACHE_NEW_WM_PROG
    },
    .emit = upload_clip_state,
 };