i965: Add support for Broadwell's new register types.

[mesa.git] / src / mesa / drivers / dri / i965 / gen7_vs_state.c

diff --git a/src/mesa/drivers/dri/i965/gen7_vs_state.c b/src/mesa/drivers/dri/i965/gen7_vs_state.c
index 6e72e8f29b9682d2e1783920cd4d5e4af9758ec4..1e76eb1ee2eb268582f9807a5df6bb8b685a7580 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_vs_state.c
@@ -29,6 +29,40 @@
 #include "program/prog_statevars.h"
 #include "intel_batchbuffer.h"
 
+
+void
+gen7_upload_constant_state(struct brw_context *brw,
+                           const struct brw_stage_state *stage_state,
+                           bool active, unsigned opcode)
+{
+   if (!active || stage_state->push_const_size == 0) {
+      /* Disable the push constant buffers. */
+      BEGIN_BATCH(7);
+      OUT_BATCH(opcode << 16 | (7 - 2));
+      OUT_BATCH(0);
+      OUT_BATCH(0);
+      OUT_BATCH(0);
+      OUT_BATCH(0);
+      OUT_BATCH(0);
+      OUT_BATCH(0);
+      ADVANCE_BATCH();
+   } else {
+      BEGIN_BATCH(7);
+      OUT_BATCH(opcode << 16 | (7 - 2));
+      OUT_BATCH(stage_state->push_const_size);
+      OUT_BATCH(0);
+      /* Pointer to the constant buffer.  Covered by the set of state flags
+       * from gen6_prepare_wm_contants
+       */
+      OUT_BATCH(stage_state->push_const_offset | GEN7_MOCS_L3);
+      OUT_BATCH(0);
+      OUT_BATCH(0);
+      OUT_BATCH(0);
+      ADVANCE_BATCH();
+   }
+}
+
+
 static void
 upload_vs_state(struct brw_context *brw)
 {
@@ -52,31 +86,8 @@ upload_vs_state(struct brw_context *brw)
    OUT_BATCH(stage_state->sampler_offset);
    ADVANCE_BATCH();
 
-   if (stage_state->push_const_size == 0) {
-      /* Disable the push constant buffers. */
-      BEGIN_BATCH(7);
-      OUT_BATCH(_3DSTATE_CONSTANT_VS << 16 | (7 - 2));
-      OUT_BATCH(0);
-      OUT_BATCH(0);
-      OUT_BATCH(0);
-      OUT_BATCH(0);
-      OUT_BATCH(0);
-      OUT_BATCH(0);
-      ADVANCE_BATCH();
-   } else {
-      BEGIN_BATCH(7);
-      OUT_BATCH(_3DSTATE_CONSTANT_VS << 16 | (7 - 2));
-      OUT_BATCH(stage_state->push_const_size);
-      OUT_BATCH(0);
-      /* Pointer to the VS constant buffer.  Covered by the set of
-       * state flags from gen6_prepare_wm_contants
-       */
-      OUT_BATCH(stage_state->push_const_offset | GEN7_MOCS_L3);
-      OUT_BATCH(0);
-      OUT_BATCH(0);
-      OUT_BATCH(0);
-      ADVANCE_BATCH();
-   }
+   gen7_upload_constant_state(brw, stage_state, true /* active */,
+                              _3DSTATE_CONSTANT_VS);
 
    /* Use ALT floating point mode for ARB vertex programs, because they
     * require 0^0 == 1.
@@ -89,7 +100,9 @@ upload_vs_state(struct brw_context *brw)
    OUT_BATCH(stage_state->prog_offset);
    OUT_BATCH(floating_point_mode |
             ((ALIGN(stage_state->sampler_count, 4)/4) <<
-              GEN6_VS_SAMPLER_COUNT_SHIFT));
+              GEN6_VS_SAMPLER_COUNT_SHIFT) |
+             ((brw->vs.prog_data->base.base.binding_table.size_bytes / 4) <<
+              GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
 
    if (brw->vs.prog_data->base.total_scratch) {
       OUT_RELOC(stage_state->scratch_bo,