* SOFTWARE.
*/
+#include <math.h>
+
+#include "util/bitscan.h"
+#include "util/half_float.h"
#include "compiler.h"
#include "helpers.h"
#include "midgard_ops.h"
}
static void
-mir_print_swizzle(unsigned *swizzle)
+mir_print_swizzle(unsigned *swizzle, nir_alu_type T)
{
+ unsigned comps = mir_components_for_type(T);
+
printf(".");
- for (unsigned i = 0; i < 16; ++i)
- putchar(components[swizzle[i]]);
+ for (unsigned i = 0; i < comps; ++i) {
+ unsigned C = swizzle[i];
+ assert(C < comps);
+ putchar(components[C]);
+ }
}
static const char *
}
}
+static void
+mir_print_embedded_constant(midgard_instruction *ins, unsigned src_idx)
+{
+ assert(src_idx <= 1);
+
+ unsigned base_size = max_bitsize_for_alu(ins);
+ unsigned sz = nir_alu_type_get_type_size(ins->src_types[src_idx]);
+ bool half = (sz == (base_size >> 1));
+ unsigned mod = mir_pack_mod(ins, src_idx, false);
+ unsigned *swizzle = ins->swizzle[src_idx];
+ midgard_reg_mode reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins));
+ unsigned comp_mask = effective_writemask(ins->op, ins->mask);
+ unsigned num_comp = util_bitcount(comp_mask);
+ unsigned max_comp = mir_components_for_type(ins->dest_type);
+ bool first = true;
+
+ printf("#");
+
+ if (num_comp > 1)
+ printf("vec%d(", num_comp);
+
+ for (unsigned comp = 0; comp < max_comp; comp++) {
+ if (!(comp_mask & (1 << comp)))
+ continue;
+
+ if (first)
+ first = false;
+ else
+ printf(", ");
+
+ mir_print_constant_component(stdout, &ins->constants,
+ swizzle[comp], reg_mode,
+ half, mod, ins->op);
+ }
+
+ if (num_comp > 1)
+ printf(")");
+}
+
+#define PRINT_SRC(ins, c) \
+ do { mir_print_index(ins->src[c]); \
+ if (ins->src[c] != ~0 && ins->src_types[c] != nir_type_invalid) { \
+ pan_print_alu_type(ins->src_types[c], stdout); \
+ mir_print_swizzle(ins->swizzle[c], ins->src_types[c]); \
+ } } while (0)
+
void
mir_print_instruction(midgard_instruction *ins)
{
else
printf("true");
+ if (ins->writeout) {
+ printf(" (c: ");
+ PRINT_SRC(ins, 0);
+ printf(", z: ");
+ PRINT_SRC(ins, 2);
+ printf(", s: ");
+ PRINT_SRC(ins, 3);
+ printf(")");
+ }
+
if (ins->branch.target_type != TARGET_DISCARD)
printf(" %s -> block(%d)\n",
- branch_target_names[ins->branch.target_type],
+ ins->branch.target_type < 4 ?
+ branch_target_names[ins->branch.target_type] : "??",
ins->branch.target_block);
return;
switch (ins->type) {
case TAG_ALU_4: {
- midgard_alu_op op = ins->alu.op;
+ midgard_alu_op op = ins->op;
const char *name = alu_opcode_props[op].name;
if (ins->unit)
}
case TAG_LOAD_STORE_4: {
- midgard_load_store_op op = ins->load_store.op;
+ midgard_load_store_op op = ins->op;
const char *name = load_store_opcode_props[op].name;
assert(name);
case TAG_TEXTURE_4: {
printf("texture");
+
+ if (ins->helper_terminate)
+ printf(".terminate");
+
+ if (ins->helper_execute)
+ printf(".execute");
+
break;
}
assert(0);
}
- if (ins->invert || (ins->compact_branch && ins->branch.invert_conditional))
+ if (ins->compact_branch && ins->branch.invert_conditional)
printf(".not");
printf(" ");
mir_print_index(ins->dest);
- if (ins->mask != 0xF)
+ if (ins->dest != ~0) {
+ pan_print_alu_type(ins->dest_type, stdout);
mir_print_mask(ins->mask);
+ }
printf(", ");
- mir_print_index(ins->src[0]);
- mir_print_swizzle(ins->swizzle[0]);
- printf(", ");
-
- if (ins->has_inline_constant)
- printf("#%d", ins->inline_constant);
- else {
- mir_print_index(ins->src[1]);
- mir_print_swizzle(ins->swizzle[1]);
- }
+ unsigned r_constant = SSA_FIXED_REGISTER(REGISTER_CONSTANT);
- printf(", ");
- mir_print_index(ins->src[2]);
- mir_print_swizzle(ins->swizzle[2]);
+ if (ins->src[0] == r_constant)
+ mir_print_embedded_constant(ins, 0);
+ else
+ PRINT_SRC(ins, 0);
printf(", ");
- mir_print_index(ins->src[3]);
- mir_print_swizzle(ins->swizzle[3]);
- if (ins->has_constants) {
- uint32_t *uc = ins->constants.u32;
- float *fc = ins->constants.f32;
-
- if (midgard_is_integer_op(ins->alu.op))
- printf(" <0x%X, 0x%X, 0x%X, 0x%x>", uc[0], uc[1], uc[2], uc[3]);
- else
- printf(" <%f, %f, %f, %f>", fc[0], fc[1], fc[2], fc[3]);
+ if (ins->has_inline_constant)
+ printf("#%d", ins->inline_constant);
+ else if (ins->src[1] == r_constant)
+ mir_print_embedded_constant(ins, 1);
+ else
+ PRINT_SRC(ins, 1);
+
+ for (unsigned c = 2; c <= 3; ++c) {
+ printf(", ");
+ PRINT_SRC(ins, c);
}
if (ins->no_spill)
void
mir_print_block(midgard_block *block)
{
- printf("block%u: {\n", block->source_id);
+ printf("block%u: {\n", block->base.name);
- if (block->is_scheduled) {
+ if (block->scheduled) {
mir_foreach_bundle_in_block(block, bundle) {
for (unsigned i = 0; i < bundle->instruction_count; ++i)
mir_print_instruction(bundle->instructions[i]);
printf("}");
- if (block->nr_successors) {
+ if (block->base.successors[0]) {
printf(" -> ");
- for (unsigned i = 0; i < block->nr_successors; ++i) {
- printf("block%u%s", block->successors[i]->source_id,
- (i + 1) != block->nr_successors ? ", " : "");
- }
+ pan_foreach_successor((&block->base), succ)
+ printf(" block%u ", succ->name);
}
printf(" from { ");
mir_foreach_predecessor(block, pred)
- printf("block%u ", pred->source_id);
+ printf("block%u ", pred->base.name);
printf("}");
printf("\n\n");
mir_print_shader(compiler_context *ctx)
{
mir_foreach_block(ctx, block) {
- mir_print_block(block);
+ mir_print_block((midgard_block *) block);
}
}