typo fix for rgbttl

[shakti-peripherals.git] / src / peripherals / rgbttl / rgbttl_dummy.bsv

diff --git a/src/peripherals/rgbttl/rgbttl_dummy.bsv b/src/peripherals/rgbttl/rgbttl_dummy.bsv
index 4e7e3f92401eee58a0331180d1a51985c727b890..163325141a47df663b7a9cfac760f3e6b92d8d72 100644 (file)
--- a/src/peripherals/rgbttl/rgbttl_dummy.bsv
+++ b/src/peripherals/rgbttl/rgbttl_dummy.bsv
@@ -29,7 +29,7 @@ Details:
 --------------------------------------------------------------------------------------------------
 */
 package rgbttl_dummy;
-  `define RGBTTL_WIDTH
+  `define RGBTTL_WIDTH 18
   `include "instance_defines.bsv"
   import ClockDiv::*;
   import ConcatReg::*;
@@ -37,7 +37,7 @@ package rgbttl_dummy;
   import BUtils ::*;
   import AXI4_Lite_Types::*;
 
-  interface Ifc_rgbttl_dummy();
+  interface Ifc_rgbttl_dummy;
          interface AXI4_Lite_Slave_IFC#(`ADDR, `DATA, `USERSPACE) slave;
     method  Bit#(1) de; 
     method  Bit#(1) ck;
@@ -47,16 +47,15 @@ package rgbttl_dummy;
   endinterface
 
   (*synthesize*)
-  module mkrgbttl_dummy(Ifc_rgbttl_dummy)
+  module mkrgbttl_dummy(Ifc_rgbttl_dummy);
                AXI4_Lite_Slave_Xactor_IFC#(`ADDR,`DATA, `USERSPACE)
                             s_xactor<-mkAXI4_Lite_Slave_Xactor();
-      let v_buswidth = valueOf(v_buswidth);
 
       Reg#(Bit#(1)) rg_de <- mkReg(0);
       Reg#(Bit#(1)) rg_ck <- mkReg(0);
       Reg#(Bit#(1)) rg_vs <- mkReg(0);
       Reg#(Bit#(1)) rg_hs <- mkReg(0);
-      Reg#(Bit#(`RGBTTL_WIDTH)) rg_data;
+      Reg#(Bit#(1)) rg_data [ `RGBTTL_WIDTH];
       for(Integer i = 0; i < `RGBTTL_WIDTH;i=i+1) begin
         rg_data[i] <- mkReg(0);
       end