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(parent: 65d9c95) | patch
Make the VL loop reentrant in HDL
authorCesar Strauss <cestrauss@gmail.com>
Tue, 6 Apr 2021 11:31:14 +0000 (08:31 -0300)
committerCesar Strauss <cestrauss@gmail.com>
Tue, 6 Apr 2021 11:32:43 +0000 (08:32 -0300)
commit01e6ae5fbb86b5648d66c9dc65cd94f84779742f
tree5c54e923545b3a1962d9947ae7470d738c80709atree
parent65d9c957717dc63d900c3c24e14cf532a604e490commit | diff
Make the VL loop reentrant in HDL

This is done by shifting-out already used mask bits, at predicate fetch.
The corresponding test case now passes.
src/soc/simple/issuer.py diff | blob | history