add INT, SPR and CR regfiles
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 25 May 2020 13:43:15 +0000 (14:43 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 25 May 2020 13:43:21 +0000 (14:43 +0100)
commit0a325453d3017b59bc7d4e5dfeb6a3c865a49e01
tree2df8e9e0a75c63454b8597d5cec5b6e0b3f135aa
parentdb13193e20441c6988e7a1b3969979461136eca3
add INT, SPR and CR regfiles
src/soc/decoder/power_enums.py
src/soc/regfile/regfiles.py