start on conversion of xics.vhdl to nmigen
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 26 Jul 2020 20:27:53 +0000 (21:27 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 26 Jul 2020 20:27:53 +0000 (21:27 +0100)
commit0ee5e92264b539e4938427c296e8d1477ae704a7
treedb644f05f6a8335478c7ad8bb8a8537c9c18d60e
parented5fd20adb5ffe712d8fdd6513f9405b173dca3e
start on conversion of xics.vhdl to nmigen
see https://bugs.libre-soc.org/show_bug.cgi?id=407
src/soc/interrupts/xics.py [new file with mode: 0644]