divide logical pipe into 2 (simple phase last)
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 13 Aug 2020 23:19:34 +0000 (00:19 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 14 Aug 2020 11:10:23 +0000 (12:10 +0100)
commit13ef0d193633f20668004eae496d9078de8a95b5
tree10c50bc36857ebd8c219122127e141dda88d6ca0
parent4d0d061035f73ebb249893c56d24f288c9455e84
divide logical pipe into 2 (simple phase last)
src/soc/fu/logical/pipeline.py
src/soc/fu/logical/test/test_pipe_caller.py