urk. wishbone slave devices declared incorrectly (I/O inverted) semi_working_ecp5
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 19 Sep 2020 15:00:37 +0000 (16:00 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 19 Sep 2020 15:00:37 +0000 (16:00 +0100)
commit24a31176943c4e846eaa192744c4df24bc4e11cd
treecc1d7db6b0703e5a0bd6b8bd01740168b3e1b6e9
parent4513aaa71cdf62e2fd9787896e91c8f5df4aa0e9
urk. wishbone slave devices declared incorrectly (I/O inverted)
src/soc/litex/florent/libresoc/core.py