projects / soclayout.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 227a0f6) | patch
rename sys_clk to sys_clk_0 and rename ref_clk to sys_clk
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 3 Jun 2021 21:52:45 +0000 (21:52 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 3 Jun 2021 21:52:45 +0000 (21:52 +0000)
commit24cbbcc90272b20d96eda94266bf8f4c980501d3
tree58ddaf8564cda1f97ca0893f36ebe826f8f85546tree
parent227a0f69bd5065d2bf098a70f05cf68eabebaf86commit | diff
rename sys_clk to sys_clk_0 and rename ref_clk to sys_clk
this restores ls180 module to minimise changes
experiments9/non_generated/full_core_4_4ksram_litex_ls180_recon.v diff | blob | history