Turned the add_0 verilog state into nmigen
authorAleksandar Kostovic <alexandar.kostovic@gmail.com>
Thu, 14 Feb 2019 08:23:17 +0000 (09:23 +0100)
committerAleksandar Kostovic <alexandar.kostovic@gmail.com>
Thu, 14 Feb 2019 08:23:17 +0000 (09:23 +0100)
commit27144dd663214de35c5f97f8cca3396401d470d0
tree194a60cad5bd228783e97cd1a58a831a29d5de8b
parent3bdb8bf118d526d896fe72708c739fbb6212cbb2
Turned the add_0 verilog state into nmigen
src/add/nmigen_add_experiment.py