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(parent: 2273b65) | patch
i965/hsw: Change L3 MOCS for depth, hiz, and stencil
authorChad Versace <chad.versace@linux.intel.com>
Thu, 18 Jul 2013 17:07:30 +0000 (10:07 -0700)
committerChad Versace <chad.versace@linux.intel.com>
Thu, 18 Jul 2013 23:18:22 +0000 (16:18 -0700)
commit30f33deccb7d481f638e34f2d9d9c107df871eab
treeb3d95b9a395851f524b656c1cc2c81f20194685btree
parent2273b652bb884a6188af7f8d063d0d0fc5497054commit | diff
i965/hsw: Change L3 MOCS for depth, hiz, and stencil

Change from "not cacheable" to "cacheable" in L3.
Do so for the draw upload path and blorp.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
src/mesa/drivers/dri/i965/gen7_blorp.cpp diff | blob | history
src/mesa/drivers/dri/i965/gen7_misc_state.c diff | blob | history