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(parent: a25051a) | patch
Extend the proof to a non-transparent port
authorCesar Strauss <cestrauss@gmail.com>
Sun, 3 Apr 2022 22:12:15 +0000 (19:12 -0300)
committerCesar Strauss <cestrauss@gmail.com>
Sun, 3 Apr 2022 22:12:15 +0000 (19:12 -0300)
commit332653c94f0e6369fa8d96087a7e392430a10daf
treec7193653e76f6b56398bae0578805cacd9ff9736tree
parenta25051acee0ee21566cd6957e3f5382317f0ef80commit | diff
Extend the proof to a non-transparent port

For the non-transparent case, have to distinguish the case of a
simultaneous write, where the expected value is the previous
value of the holding register, not the new.
src/soc/regfile/sram_wrapper.py diff | blob | history