split out Logical Input and Output stages to common code, allows removal
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 22 May 2020 18:19:16 +0000 (19:19 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 22 May 2020 18:19:16 +0000 (19:19 +0100)
commit38124a158a732c7ea2e3d51ba67990bf8b145630
tree57894589f8c5bd9a93f3e279f1e249c877c432be
parent1aca708a10492637b144adc79a9351c37add6f0a
split out Logical Input and Output stages to common code, allows removal
of XER.SO from Logical pipeline
src/soc/fu/alu/output_stage.py
src/soc/fu/common_input_stage.py
src/soc/fu/common_output_stage.py [new file with mode: 0644]
src/soc/fu/logical/main_stage.py
src/soc/fu/logical/pipe_data.py
src/soc/fu/logical/pipeline.py
src/soc/fu/logical/test/test_pipe_caller.py