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(parent: 7a52e57) | patch
expand instruction bus width to 64 bit, start on a mini-cache
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 28 Jun 2020 17:23:08 +0000 (18:23 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 28 Jun 2020 17:23:08 +0000 (18:23 +0100)
commit395c5c33e73359c9e3d9899899a933b1cebbaa49
tree320d95daff702c1e90706709aa25b817d49db743tree
parent7a52e57bc7013504067bdf55076fdaa8af866bfccommit | diff
expand instruction bus width to 64 bit, start on a mini-cache
for instructions (one line)
src/soc/simple/issuer.py diff | blob | history
src/soc/simple/test/test_issuer.py diff | blob | history