move over to from openpower imports
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 23 Apr 2021 14:30:39 +0000 (15:30 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 23 Apr 2021 14:30:39 +0000 (15:30 +0100)
commit3ba07d7528444bc085778bc7f643352e866f7a88
tree4fe880cab64840e965b50d1722191dab5ab00a85
parent111257b21f9ae4c26b82699ba950599695eee44e
move over to from openpower imports
106 files changed:
src/soc/debug/firmware_upload.py
src/soc/decoder/formal/proof_decoder.py
src/soc/decoder/formal/proof_decoder2.py
src/soc/decoder/helpers.py
src/soc/decoder/isa/caller.py
src/soc/decoder/power_pseudo.py
src/soc/decoder/power_regspec_map.py
src/soc/decoder/power_svp64.py
src/soc/decoder/power_svp64_extra.py
src/soc/decoder/power_svp64_rm.py
src/soc/decoder/pseudo/lexer.py
src/soc/decoder/pseudo/parser.py
src/soc/decoder/test/test_decoder_gas.py
src/soc/decoder/test/test_power_decoder.py
src/soc/experiment/alu_hier.py
src/soc/experiment/compalu.py
src/soc/experiment/compldst_multi.py
src/soc/experiment/l0_cache.py
src/soc/experiment/pimem.py
src/soc/experiment/score6600.py
src/soc/experiment/score6600_multi.py
src/soc/experiment/sim.py
src/soc/experiment/test/test_compalu_multi.py
src/soc/fu/alu/alu_input_record.py
src/soc/fu/alu/formal/proof_input_stage.py
src/soc/fu/alu/formal/proof_main_stage.py
src/soc/fu/alu/formal/proof_output_stage.py
src/soc/fu/alu/main_stage.py
src/soc/fu/alu/output_stage.py
src/soc/fu/alu/test/svp64_cases.py
src/soc/fu/alu/test/test_pipe_caller.py
src/soc/fu/branch/br_input_record.py
src/soc/fu/branch/formal/proof_input_stage.py
src/soc/fu/branch/formal/proof_main_stage.py
src/soc/fu/branch/main_stage.py
src/soc/fu/branch/test/test_pipe_caller.py
src/soc/fu/common_input_stage.py
src/soc/fu/common_output_stage.py
src/soc/fu/compunits/compunits.py
src/soc/fu/compunits/formal/test_compunit.py
src/soc/fu/compunits/test/test_alu_compunit.py
src/soc/fu/compunits/test/test_branch_compunit.py
src/soc/fu/compunits/test/test_compunit.py
src/soc/fu/compunits/test/test_cr_compunit.py
src/soc/fu/compunits/test/test_div_compunit.py
src/soc/fu/compunits/test/test_ldst_compunit.py
src/soc/fu/compunits/test/test_logical_compunit.py
src/soc/fu/compunits/test/test_shiftrot_compunit.py
src/soc/fu/compunits/test/test_spr_compunit.py
src/soc/fu/compunits/test/test_trap_compunit.py
src/soc/fu/cr/cr_input_record.py
src/soc/fu/cr/formal/proof_main_stage.py
src/soc/fu/cr/main_stage.py
src/soc/fu/cr/test/test_pipe_caller.py
src/soc/fu/div/core_stages.py
src/soc/fu/div/formal/proof_main_stage.py
src/soc/fu/div/output_stage.py
src/soc/fu/div/setup_stage.py
src/soc/fu/div/test/helper.py
src/soc/fu/div/test/test_pipe_caller.py
src/soc/fu/div/test/test_pipe_caller_long.py
src/soc/fu/ldst/ldst_input_record.py
src/soc/fu/ldst/test/test_pipe_caller.py
src/soc/fu/logical/formal/proof_input_stage.py
src/soc/fu/logical/formal/proof_main_stage.py
src/soc/fu/logical/logical_input_record.py
src/soc/fu/logical/main_stage.py
src/soc/fu/logical/output_stage.py
src/soc/fu/logical/test/test_pipe_caller.py
src/soc/fu/mmu/fsm.py
src/soc/fu/mmu/mmu_input_record.py
src/soc/fu/mmu/test/test_issuer_mmu_data_path.py
src/soc/fu/mmu/test/test_issuer_mmu_rom.py
src/soc/fu/mmu/test/test_non_production_core.py
src/soc/fu/mmu/test/test_pipe_caller.py
src/soc/fu/mul/formal/proof_main_stage.py
src/soc/fu/mul/mul_input_record.py
src/soc/fu/mul/post_stage.py
src/soc/fu/mul/test/helper.py
src/soc/fu/mul/test/test_pipe_caller.py
src/soc/fu/mul/test/test_pipe_caller_long.py
src/soc/fu/pipe_data.py
src/soc/fu/shift_rot/formal/proof_main_stage.py
src/soc/fu/shift_rot/main_stage.py
src/soc/fu/shift_rot/sr_input_record.py
src/soc/fu/shift_rot/test/test_maskgen.py
src/soc/fu/shift_rot/test/test_pipe_caller.py
src/soc/fu/spr/formal/proof_main_stage.py
src/soc/fu/spr/main_stage.py
src/soc/fu/spr/spr_input_record.py
src/soc/fu/spr/test/test_pipe_caller.py
src/soc/fu/test/common.py
src/soc/fu/trap/formal/proof_main_stage.py
src/soc/fu/trap/main_stage.py
src/soc/fu/trap/test/test_pipe_caller.py
src/soc/fu/trap/trap_input_record.py
src/soc/regfile/regfiles.py
src/soc/regfile/util.py
src/soc/scoreboard/instruction_q.py
src/soc/simple/core.py
src/soc/simple/issuer.py
src/soc/simple/test/test_core.py
src/soc/simple/test/test_issuer.py
src/soc/simple/test/test_microwatt.py
src/soc/simple/test/test_runner.py
src/soc/sv/trans/svp64.py