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(parent: b546121) | patch
bug in mmu setting radix tree size with one extra bit
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 22 Dec 2021 00:03:33 +0000 (00:03 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 22 Dec 2021 00:03:33 +0000 (00:03 +0000)
commit3cc1c209a2079c052be7c64c5b22598ec2393c45
treeaab5244d8838113914b2d0003c4234594547f04dtree
parentb54612199531fcf960722e9e8c03f3b242f551f7commit | diff
bug in mmu setting radix tree size with one extra bit
rts does not include bit 63 (MSB0 bit 0)
src/soc/experiment/mmu.py diff | blob | history