Initial commit.
authorSiFive <>
Tue, 29 Nov 2016 13:23:11 +0000 (05:23 -0800)
committerSiFive <>
Tue, 29 Nov 2016 13:23:11 +0000 (05:23 -0800)
commit3cf8128a3037cbe02a1542c43f7bf3798f6060b1
tree91a8d88c9de277d5b30b8643103f7b2f9247fd04
Initial commit.
37 files changed:
.gitignore [new file with mode: 0644]
LICENSE [new file with mode: 0644]
Makefile.e300artydevkit [new file with mode: 0644]
Makefile.u500vc707devkit [new file with mode: 0644]
README.md [new file with mode: 0644]
bootrom/e300artydevkit.img [new file with mode: 0755]
bootrom/u500vc707devkit.img [new file with mode: 0755]
bootrom/xip/xip.S [new file with mode: 0644]
build.sbt [new file with mode: 0644]
common.mk [new file with mode: 0644]
fpga/e300artydevkit/.gitignore [new file with mode: 0644]
fpga/e300artydevkit/Makefile [new file with mode: 0644]
fpga/e300artydevkit/constrs/arty-config.xdc [new file with mode: 0644]
fpga/e300artydevkit/constrs/arty-master.xdc [new file with mode: 0644]
fpga/e300artydevkit/script/board.tcl [new file with mode: 0644]
fpga/e300artydevkit/script/cfgmem.tcl [new file with mode: 0644]
fpga/e300artydevkit/script/impl.tcl [new file with mode: 0644]
fpga/e300artydevkit/script/init.tcl [new file with mode: 0644]
fpga/e300artydevkit/script/ip.tcl [new file with mode: 0644]
fpga/e300artydevkit/script/prologue.tcl [new file with mode: 0644]
fpga/e300artydevkit/src/system.v [new file with mode: 0644]
fpga/u500vc707devkit/Makefile [new file with mode: 0644]
fpga/u500vc707devkit/constrs/vc707-master.xdc [new file with mode: 0644]
fpga/u500vc707devkit/script/board.tcl [new file with mode: 0644]
fpga/u500vc707devkit/script/cfgmem.tcl [new file with mode: 0644]
fpga/u500vc707devkit/script/impl.tcl [new file with mode: 0644]
fpga/u500vc707devkit/script/init.tcl [new file with mode: 0644]
fpga/u500vc707devkit/script/ip.tcl [new file with mode: 0644]
fpga/u500vc707devkit/script/mig.prj [new file with mode: 0644]
fpga/u500vc707devkit/script/prologue.tcl [new file with mode: 0644]
fpga/u500vc707devkit/src/sdio.v [new file with mode: 0644]
fpga/u500vc707devkit/src/system.v [new file with mode: 0644]
src/main/scala/everywhere/e300artydevkit/Configs.scala [new file with mode: 0644]
src/main/scala/everywhere/e300artydevkit/Top.scala [new file with mode: 0644]
src/main/scala/unleashed/u500vc707devkit/Configs.scala [new file with mode: 0644]
src/main/scala/unleashed/u500vc707devkit/Top.scala [new file with mode: 0644]
src/main/scala/unleashed/u500vc707devkit/vc707reset.scala [new file with mode: 0644]