whoops shift has to be done at same bitwidth
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 17 Mar 2021 13:16:24 +0000 (13:16 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 17 Mar 2021 13:16:24 +0000 (13:16 +0000)
commit4503683e7b8bd78080337b282688e1ad04628d45
tree9d6ea8f3c8a853a41eca69135f749c3bd517d597
parent442f56e9f932f230b5cc72436bc54d3e9afa9d4e
whoops shift has to be done at same bitwidth
src/soc/decoder/isa/radixmmu.py