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(parent: c6c9c87) | patch
reorg of PLL, routed out into peripheral interconnect
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 9 Jun 2021 15:19:50 +0000 (15:19 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 9 Jun 2021 15:19:50 +0000 (15:19 +0000)
commit47bc6988f49518015f684e8fc4471f31615059db
treea6152aba8b98088ef082e0d2af74f82a6cd97371tree
parentc6c9c87c733c82657fd9f11935219f838469f817commit | diff
reorg of PLL, routed out into peripheral interconnect
then manually connected up
needed a rename of sys_clk to sys_pllclk to not conflict
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