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(parent: 0fc47b5) | patch
start converting hardfloat-verilog fmac to nmigen
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 10 Aug 2019 06:29:09 +0000 (07:29 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 10 Aug 2019 06:29:09 +0000 (07:29 +0100)
commit47ceb8804d82cb83a617146789acfa1e5d8e0874
tree1bfc5c97fc73dc9075618637caa623b59d84a608tree
parent0fc47b57590d3304a807d63593c2e95aac415469commit | diff
start converting hardfloat-verilog fmac to nmigen
src/ieee754/fpdiv/mulAddRecFN.py [new file with mode: 0644] blob
src/nmutil/multipipe.py diff | blob | history
src/nmutil/test/test_inout_feedback_pipe.py diff | blob | history