projects / ls2.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: f2357f2) | patch
invert CRG reset on PLL see if it makes any difference
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 23 Feb 2022 14:14:53 +0000 (14:14 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 23 Feb 2022 14:14:53 +0000 (14:14 +0000)
commit495b0a058993586948d5c22a577a13142cc7a12a
tree5740db78b72a845abf7c0b1f1d8ed7dd63064574tree
parentf2357f22dc48692756118a52b9ce3ae5171a07cacommit | diff
invert CRG reset on PLL see if it makes any difference
also reduce power-on-reset delay
src/crg.py diff | blob | history