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genxml: Add Gen9 CACHE_MODE_1 definitons.
authorKenneth Graunke <kenneth@whitecape.org>
Wed, 24 May 2017 04:30:02 +0000 (21:30 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Tue, 30 May 2017 21:59:31 +0000 (14:59 -0700)
commit53368b008e62ddfbda896b5f0d3c69415052a845
treeab7a91cecb30e272c19778e9f5e55ec1244d5ae2tree
parenta8fde221a8f9a561c592a7d51a656d10037c7912commit | diff
genxml: Add Gen9 CACHE_MODE_1 definitons.

These were already in gen8.xml but not gen9.xml.  There are a few new
fields and a couple that have changed.  These are all documented in the
Skylake PRM, Volume 2c Command Reference: Registers, Part 1.

Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
src/intel/genxml/gen9.xml diff | blob | history