add src1/2 pending outputs
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 10 May 2019 04:54:18 +0000 (05:54 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 10 May 2019 04:54:18 +0000 (05:54 +0100)
commit54c575b1b2e070257ee3d86278acd0e46c6931f1
tree9696e21bd96ed7bfee82e85badb78bc3a5a039ed
parent7b923454817d85424aae7a92c715265b83981aee
add src1/2 pending outputs
src/scoreboard/fu_reg_matrix.py
src/scoreboard/fu_wr_pending.py