add a test SRAM that lives behind a minerva LoadStoreUnitInterface
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 26 Jun 2020 11:44:23 +0000 (12:44 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 26 Jun 2020 11:44:23 +0000 (12:44 +0100)
commit638a80fc060668f0cb4a5310534e2c950a2f2426
treee513dfc40b46c39bc78f5e41e742718dff796f02
parent562136e4592def55c2e404e3336ae3c55f0e3a94
add a test SRAM that lives behind a minerva LoadStoreUnitInterface
src/soc/bus/test/test_minerva.py [new file with mode: 0644]
src/soc/config/loadstore.py