add FreePDK45 experiments10_verilog doDesign.py
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 12 Apr 2021 16:33:21 +0000 (16:33 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 12 Apr 2021 16:33:21 +0000 (16:33 +0000)
commit6a7136e6c577394e3c86a449bc07c7c4e50ce33e
tree4c78ebac142751bce68d793feb62d0b6363b3d89
parenta305d205f71a1b1ba046077d3f46ab904a7d545d
add FreePDK45 experiments10_verilog doDesign.py
experiments10_verilog/freepdk_c4m45/coriolis2/__init__.py [new file with mode: 0644]
experiments10_verilog/freepdk_c4m45/doDesign.py [new file with mode: 0644]