put multi-ports back (for read) on int and fast regfiles
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 14 Aug 2020 11:59:01 +0000 (12:59 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 14 Aug 2020 11:59:01 +0000 (12:59 +0100)
commit71018f77f21189ffc7137bf0567059f6889fb1a0
tree1c561010e029a71be8c80f874b72b550ad1b5c63
parentba53cce8be7e9d4c4cdc0daa3a7a7f74235f0592
put multi-ports back (for read) on int and fast regfiles
src/soc/regfile/regfiles.py
src/soc/simple/core.py
src/soc/simple/issuer_verilog.py