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(parent: e04a3fe) | patch
hmmm XICS data being asserted on wb bus for too long
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 5 Sep 2020 19:52:35 +0000 (20:52 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 5 Sep 2020 19:52:35 +0000 (20:52 +0100)
commit71bed3ed83889bcbdb52ca15ac57a76d2461aec5
tree035ecef7fe7c73a1c68433a8b0e6ffb10d376019tree
parente04a3fe50d05f58219c26ea5a4d86e5729066835commit | diff
hmmm XICS data being asserted on wb bus for too long
src/soc/interrupts/xics.py diff | blob | history