projects / soc.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: b91c972) | patch
ALU output stage, change logic slightly
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 9 Jul 2020 19:37:14 +0000 (20:37 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 9 Jul 2020 19:37:14 +0000 (20:37 +0100)
commit71e09d8ed7d520728ec93c34e13f0ba29252860c
treebd2deb6a15eb858683222dd6f7463c6e26aa7c41tree
parentb91c9727c26f26e05093b09b7febdf80bb89df0dcommit | diff
ALU output stage, change logic slightly
test for oe/ok then set xer/ov data/ok if true
src/soc/fu/alu/output_stage.py diff | blob | history