add simulator test for divw
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 19 Jun 2020 09:49:20 +0000 (10:49 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 19 Jun 2020 09:49:20 +0000 (10:49 +0100)
commit7e8490764854213aa6c343d86b7f31ba92d54bd0
tree16001caabc3abf915a5913b16ba75e9635283078
parent32db050bdcccd20dbe1437d6f81d74f3ff2c9ceb
add simulator test for divw
src/soc/simulator/test_div_sim.py [new file with mode: 0644]