disallow adding verilog files
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 5 Jun 2021 18:07:40 +0000 (19:07 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 5 Jun 2021 18:07:40 +0000 (19:07 +0100)
commit7f9016c7d485eabd6d68756e3c3bbf68ff71c178
tree61539286832ecc4a89d7000012e178b381efeab9
parent52084147ba3485128d93334f6fccb38e626ec46d
disallow adding verilog files
.gitignore