add option for QTY 4x 4k SRAM blocks (not added yet) to issuer_verilog
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 20 Feb 2021 14:39:14 +0000 (14:39 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 20 Feb 2021 14:39:14 +0000 (14:39 +0000)
commit7fcfedd8cde28e9e996edd2c9cf34a7a72960c51
treeeca5a6fca3f60d24b200a0849c6be2e8cdc5efd5
parent800e4d580b833f1307bf447987a1bc3acf2515a4
add option for QTY 4x 4k SRAM blocks (not added yet) to issuer_verilog
src/soc/simple/issuer_verilog.py