increase core size to 50000 (DFF SRAMs)
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 20 Feb 2021 15:24:02 +0000 (15:24 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 20 Feb 2021 15:24:02 +0000 (15:24 +0000)
commit9a6706823770bffc0c49ed43f8bfdb869dffd922
tree930879e3208df36e79535488739c41360a240b95
parentb8fec3da8c3d8bdb75c46ce03ae91e82421c2f29
increase core size to 50000 (DFF SRAMs)
experiments9/doDesign.py
experiments9/non_generated/full_core_4_4ksram_ls180.il [new file with mode: 0644]