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(parent: 0136068) | patch
add MemoryMap to UART16550 (TODO, put that into UART16550 class)
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 13 Feb 2022 14:13:51 +0000 (14:13 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 13 Feb 2022 14:13:51 +0000 (14:13 +0000)
commit9ba83df4c6fa64600337bfe8af9ad4c5fba5785c
tree265a330de8b44f292ff06fee580e9f320b742b1etree
parent013606868736fad0d1f475ff3c113c4e20548568commit | diff
add MemoryMap to UART16550 (TODO, put that into UART16550 class)
examples/ls2.py [new file with mode: 0644] blob
examples/soc.py [deleted file] blob | history