radeonsi: handle non-clearable DCC buffers as MSAA resolve dst
authorMarek Olšák <marek.olsak@amd.com>
Wed, 20 Jun 2018 23:15:36 +0000 (18:15 -0500)
committerMarek Olšák <marek.olsak@amd.com>
Thu, 21 Jun 2018 18:42:14 +0000 (14:42 -0400)
commit9c21002f6ed0621fbd68f413eceb58a89ace7275
tree0128b2a04c3545902a214c5f568d1cb862fdef32
parent587e712eda95c31d88ea9d20e59ad0ae59afef4f
radeonsi: handle non-clearable DCC buffers as MSAA resolve dst

This is reproducible on Stoney, but other chips may be affected too.

Cc 18.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
src/gallium/drivers/radeonsi/si_blit.c
src/gallium/drivers/radeonsi/si_clear.c