add clock output on hyperram sim
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 26 Mar 2022 22:40:47 +0000 (22:40 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 26 Mar 2022 22:40:47 +0000 (22:40 +0000)
commita110edc4b7b18d1a8e4030ec63b58aaf4062f7b4
tree13988f0260023a1642e99f61f90d40603386709e
parentee1347be34484427fb5513a827cdc83ad2d45aa0
add clock output on hyperram sim
src/simsoc_hyperram_tb.v