add FreePDK45 variant of experiments10_verilog
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 12 Apr 2021 16:15:38 +0000 (16:15 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 12 Apr 2021 16:15:38 +0000 (16:15 +0000)
commita305d205f71a1b1ba046077d3f46ab904a7d545d
tree7dc8b02709244b454366631e7cdbbea40957e469
parent74b4b03c6ffb028770cf7bbfa4229ea481e3aff0
add FreePDK45 variant of experiments10_verilog
experiments10_verilog/freepdk_c4m45/Makefile [new file with mode: 0755]
experiments10_verilog/freepdk_c4m45/build_full.sh [new file with mode: 0755]
experiments10_verilog/freepdk_c4m45/design-flow.mk [new file with mode: 0644]
experiments10_verilog/freepdk_c4m45/mksym.sh [new file with mode: 0755]
experiments10_verilog/freepdk_c4m45/netlists.txt [new file with mode: 0644]
mksym.sh