add SVP64 dststep incrementing in PowerDecoder2, Testissuer and ISACaller
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 17 Mar 2021 21:29:49 +0000 (21:29 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 17 Mar 2021 21:29:49 +0000 (21:29 +0000)
commita4f67b540aaf07bc8459754555148a264af90218
tree1918c2d254c34f902058f746f5bec610800a44c7
parent4a62e46f76219b3c02fee379047d8a18df2f22fc
add SVP64 dststep incrementing in PowerDecoder2, Testissuer and ISACaller
src/soc/decoder/isa/caller.py
src/soc/decoder/power_decoder2.py
src/soc/simple/issuer.py