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(parent: 911b485) | patch
lots of sorting out iopads
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 28 Sep 2020 11:33:33 +0000 (12:33 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 28 Sep 2020 11:33:37 +0000 (12:33 +0100)
commitab4d1fa021ca35ee49deea4903593a20d5cc7ec1
tree5f9d8dcb97316991d30cfd760c8b9e4d44e2f2f4tree
parent911b4858ff2fb8cf605bc0b530269182f7a6f5a9commit | diff
lots of sorting out iopads
* add sdram clock
* rename serial to uart
* disable I2C for now (needs bi-directional pads)
* make sdram and sd0 "en" only one pin (sort out litex issue)
* add "NC" pins so that there are no missing pins
src/soc/debug/jtag.py diff | blob | history
src/soc/litex/florent/libresoc/core.py diff | blob | history
src/soc/litex/florent/libresoc/ls180.py diff | blob | history
src/soc/litex/florent/ls180soc.py diff | blob | history