wishbone: optimise SRAM addr_width
authorHarry Ho <hh@m-labs.hk>
Wed, 8 Jan 2020 06:39:43 +0000 (14:39 +0800)
committerHarry Ho <hh@m-labs.hk>
Wed, 29 Jan 2020 07:13:18 +0000 (15:13 +0800)
commitad14cd097e58f8d73b53c13c36bdbe3299f249ad
tree87e407540a2f486d41e2136b4f86fae1e2093eaf
parent5bee9e951fb6868e0e6b7da9c0f9e6ea651a1007
wishbone: optimise SRAM addr_width
nmigen_soc/wishbone/sram.py