add in/out of ref_clk and pllclk_clk when PLL enabled
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 9 Jun 2021 13:32:26 +0000 (14:32 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 9 Jun 2021 15:51:21 +0000 (16:51 +0100)
commitb260c4e952d8018aa60f3f8de527e997701a5f4d
tree560e900ddc66fd7a2200bc05794c97a441f6fd65
parent8d6a1857d6a607895b0086e084cbedc17637849b
add in/out of ref_clk and pllclk_clk when PLL enabled
src/soc/simple/issuer.py