managed to make round signal an output from normalisation phase
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 2 Mar 2019 12:42:30 +0000 (12:42 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 2 Mar 2019 12:42:30 +0000 (12:42 +0000)
commitb8b05bcf55a80a3cdd6e01aaa215e3c6948e9711
tree73003dfd939f8838cec59d4436a6a65e796ee715
parent0242003ad6948764f337df73329d76aaf6802bb7
managed to make round signal an output from normalisation phase
src/add/nmigen_add_experiment.py