Avoid a combinatorial loop on valid_o

Avoid a combinatorial loop on valid_o

The path was:

all_rd (1) -> all_rd_pulse (1) -> alui_l.s (1) ->
-> alu.p.valid_i (1) -> ALU (zero-delay) -> alu.n.valid_o (1) ->
-> rok_l.r (1) -> all_rd (0)

Decided to break the loop on the reset of the read-done, write proceed
latch (rok_l.r), with no ill effects on performance.

Added a test case for this, using the zero-delay ALU (OP_NOP).