i965/fs: shuffle 32bits into 64bits for doubles

i965/fs: shuffle 32bits into 64bits for doubles

VS Thread Payload handles attributes in URB as vec4, no matter if they
are actually single or double precision.

So with double-precision types, value ends up in the registers split in
32bits chunks, in different positions.

We need to shuffle the chunks to get the doubles correctly.

v2:
 * Extra blank line. Add { } on if body (Ian Romanick)
 * Use dest directly (Kenneth Graunke)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>