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(parent: 3c42586) | patch
add msr exception bits setting function in hardware
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 21 Jul 2020 13:10:54 +0000 (14:10 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 21 Jul 2020 13:10:54 +0000 (14:10 +0100)
commitd8443042357b41ffaf57f480ff2e1d5b8343c73c
tree5c7ce1edc779d0207441603b5d0e06bbb23b38b1tree
parent3c425869fd36a73a040e07b58050069c6022b0decommit | diff
add msr exception bits setting function in hardware
and do same thing in ISACaller trap
src/soc/decoder/isa/caller.py diff | blob | history
src/soc/fu/trap/main_stage.py diff | blob | history