add test instruction memory SRAM
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 16 Jun 2020 12:41:17 +0000 (13:41 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 16 Jun 2020 12:41:17 +0000 (13:41 +0100)
commitd9e947e2b91e592732fef8d8a4a9412c4503c79b
tree1ec90fba9d50a0f5b1cc0bb808ee922c6620d979
parent0c808e017b4349c01354853de3d559c9cf9c8b57
add test instruction memory SRAM
src/soc/regfile/regfiles.py
src/soc/simple/core.py