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(parent: f7c9d27) | patch
not perfect but close enough: add read registers RA/S/B/C in parser
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 13 Jul 2020 10:30:30 +0000 (11:30 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 13 Jul 2020 10:30:30 +0000 (11:30 +0100)
commitdc037cdb8c2a587cb7e45507cc24c05faf4c41d3
tree40f232d8ee380369b54e4e3da05f30a01dd216catree
parentf7c9d276783bb8caf11d17710836f8f03be64f17commit | diff
not perfect but close enough: add read registers RA/S/B/C in parser
libreriscv diff | blob | history
src/soc/decoder/pseudo/parser.py diff | blob | history