add setting of MSR "PR" bit for when running MMU test
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 11 May 2021 11:27:00 +0000 (12:27 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 11 May 2021 11:27:00 +0000 (12:27 +0100)
commite84bed4b66dcd68856aeb6aed028ccda31cbf5b5
treee83bc954e672825c982b568d222d15340eadbbeb
parent4841568f4c6ff22395a8b4f94e387190e8241e38
add setting of MSR "PR" bit for when running MMU test
src/openpower/test/mmu/mmu_rom_cases.py